Comparison of Sb2O3 and Sb2O3/SiO2 Double Stacked pH Sensing Membrane Applied in Electrolyte-Insulator-Semiconductor Structure

In this study, electrolyte-insulator-semiconductor (EIS) capacitors with Sb2O3/SiO2 double stacked sensing membranes were fabricated with pH sensing capability. The results indicate that Sb2O3/SiO2 double stacked membranes with appropriate annealing had better material quality and sensing performance than Sb2O3 membranes did. To investigate the influence of double stack and annealing, multiple material characterizations and sensing measurements on membranes including of X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), and scanning electron microscopy (SEM) were conducted. These analyses indicate that double stack could enhance crystallization and grainization, which reinforced the surface sites on the membrane. Therefore, the sensing capability could be enhanced, Sb2O3/SiO2-based with appropriate annealing show promises for future industrial ion sensing devices.


Introduction
In the 1980s, an enzyme sensor based on an electrolytic insulator semiconductor [1,2] (EIS) capacitive structure was demonstrated, which had a very simple structure. These EIS sensors consist of a dielectric layer [3] and are deposited on a silicon substrate [4]. The EIS sensor is immersed in a sample solution to form a capacitance structure and the capacitance of the structure changes [5] depending on the pH value of the contact liquid [6]. As the pH value changes, the flat band capacitance [7] of the EIS chip moves along the voltage axis [8]. Through the change of capacitance [9], the corresponding voltage change [10] can be measured according to the pH value (voltage-capacitance method). In recent years, several kinds of high-k dielectrics [11] have been proposed as sensing membranes such as WO 3 [12], Y 2 O 3 [13], Pr 2 O3 [14], and HfO 2 [15] to substitute SiO 2 [16] as a sensing membrane due to its low cost, compatibly with silicon, and compact size [17]. However, the dangling bonds and traps in high-k materials may cause great trouble in the future, and these peak applications in sensing devices [18]. SiO 2 as the sensing membrane still has some advantages such as better crystallization and lower defect density [19]. Therefore, it is possible to have dual advantages by combing SiO 2 and other dielectrics. In this work, double layer Sb 2 O 3/ SiO 2 [20] sensing films were fabricated. Post-RTA in different temperatures (400 • C, 500 • C, 600 • C) was applied in EIS structure [21]. The sensor performance including sensitivity [22], hysteresis [23], and drift, rate [24], were measured to find the optimal annealing condition [25]. To examine the improvements of material properties, X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), and atomic force microscope (AFM) [26,27] were used to examine the crystalline structure, chemical bindings, and surface roughness. The results indicate that double stack and annealing could enhance crystallization and suppress silicate-related defects [28,29].

Experimental
The EIS structures were fabricated on 4-in n-type (100) Si wafers, which have a resistivity of 5-10 Ω-cm. The standard Radio Corporation of America (RCA) cleaning process was performed on the chips. The chip was first immersed in ethanol for 5 min and soaked in DI water for 5 min. Followed by immersion in acetone for 5 min, cleansed in DI water for 5 min, and then isopropyl alcohol was used to remove the organic contaminates. Then, the samples were dipped into 1% hydrofluoric acid to remove native oxide from the surface. A SiO 2 film of 50 nm in thickness was grown on the wafer by dry thermal oxidation. Then, a 50-nm Sb 2 O 3 was deposited by radio frequency (RF) reactive sputtering on an n-type silicon wafer and a SiO 2 deposited wafer, respectively. During the RF sputtering, the Sb 2 O 3 target was used in the ambient of Ar: O 2 at 20:5. The RF power and pressure were 100 Watt and 20mTorr, respectively. Next, the samples were annealed at different temperatures (400 • C, 500 • C, and 600 • C) by rapid thermal annealing (RTA) in O 2 ambient for 30 s. The back-side contact of the Si wafer was deposited by Al film with 300 nm-thick. Then, the sensing area was defined by a standard photolithography process using a photosensitive epoxy, SU8-2005 of Micro-Chem Inc. (Adel, GA, USA). Finally, the samples were fabricated on the copper lines of the printed circuit board (PCB) by silver gel. As for the sensing dielectric dimensions, the SiO 2 film of 50 nm in thickness was grown on the wafer by thermal dry oxidation. Then, a 50-nm Sb 2 O 3 was deposited by radio frequency (rf) reactive sputtering on the SiO 2 film. The sensing area is 0.01 cm 2 . The oxide thicknesses were determined by high-frequency (100 kHz) capacitance-voltage (C-V) measurements. The expected error range of the oxide thicknesses for values is about 5-10%. An epoxy package was used to separate the EIS structure and the copper line. The detailed Sb 2 O 3 /SiO 2 EIS structure is illustrated in Figure 1.    (440) can be observed at 27.67 • , 32.08 • , and 45.96 • can be observed for the two types of samples, respectively. When the temperature increased to 500 • C, the peak (222), (400) and (440) intensity increased. Due to enhancement of the crystalline structure during annealing, the peak intensity increased. The two types of samples annealed at a temperature of 500 • C exhibited the strongest peak of (222) and (440) among all of the samples. Moreover, compared with the single-layer (Sb 2 O 3 ), the double-layer structure had a narrow full width at half maximum (FWHM), indicating the grain was larger. In addition, the peaks of the double stacked samples were stronger indicative of strong crystallization. The results reveal that the double-layer (Sb 2 O 3 /SiO 2 ) had better crystallization and lower defect density.
To investigate the chemical-binding states in the Sb 2 O 3 /SiO 2 and Sb 2 O 3 sensing membranes, XPS was used. The O 1s spectra for the as-deposited Sb 2 O 3 and Sb 2 O 3 annealed films are shown in Figure 3a with their appropriate three-peak curve-fitting lines. In the three sets of spectra, the O 1s signal comprised three peaks at 532.9, 531.2 and 530.6 eV, which are SiO 2 , Sb-silicate, and Sb 2 O 3 respectively. Compared to the single-layer (Sb 2 O 3 ), the intensity of the double-layer (Sb 2 O 3 /SiO 2 ) film had a stronger Sb 2 O 3 peak and weaker silicate peak, especially for the sample annealed at 500 • C. This was due to the fact that the SiO 2 layer can block Sb atoms from diffusion into the silicon to form silicate. After post-RTA annealing treatment at 500 • C in O 2 , the O 1s peak corresponding to Sb-silicate became weaker for the two types of samples indicative of improvement of crystallization and low defect density.  Consistent with XRD analysis, the double-layer structure has a narrower full width at half maximum, larger grains can make the surface roughness higher. In the case of 500 • C, there was the optimal lattice structure. As the annealing temperature approached the melting point, the crystal grains gradually disappear and the roughness began to decrease. When the temperature reached 600 • C, the roughness value decreased. This may be due to the fact there were many defects in the film and the lattice structure was destroyed.
To     annealed in the temperature of 500 • C possessed the highest sensitivity since the annealing at an appropriate temperature could compensate oxygen vacancies to improve the sensing capability. Moreover, with the addition of the SiO 2 layer, the trapping charges or dangling bonds could be reduced since the thermal grown SiO 2 layer was near-perfect dielectric with fewer defects.
To investigate the hysteresis effects of the membrane, the tested samples were immersed in buffer solutions with different pH values in an alternate cycle (pH 7, pH 4, pH 7, pH 10, and pH 7). The submerging time was five minutes for each solution. We subjected the above samples to a pH loop of 7→4→7→10→7 over 30 min. The hysteresis voltage was defined as the gate voltage difference between the initial and the terminal voltages measured in the above pH loop. The interior sites of defects could react with the ions existing in the tested solution and thus generate hysteresis response.    To investigate the drift rate of the membrane for long-time reliability, the tested samples were immersed in pH7 buffer solutions and the submerging time was twelve hours. We can use the model of gate voltage drift of pH-ISFET to describe a hopping and/or traplimited transport mechanism. 'Drift coefficient' is a parameter that describes the long-term stability of a pH sensor. The curves of drift effect of the Sb 2 O 3 and Sb 2 O 3 /SiO 2 sensing film were measured in pH 7 buffer solution for 12 h as shown in Figure 7a,b respectively. Figure 6a shows the drift rate values of the as-dep Sb 2 O 3 sample and the Sb 2 O 3 samples annealed at 400 • C, 500 • C, and 600 • C were 35.43 mV/h, 8.11 mV/h, 7.25 mV/h, and 12.71 mV/h, respectively. Figure 6b shows the drift rate of the as-dep Sb 2 O 3 /SiO 2 sample and the Sb 2 O 3 /SiO 2 samples annealed at 400 • C, 500 • C and 600 • C were 12.56 mV/h, 7.15 mV/h, 6.48 mV/h, and 10.31 mV/h, respectively. The Sb 2 O 3 /SiO 2 sample annealed in O 2 treatment at a temperature of 500 • C had the lowest hysteresis deviation.

Conclusions
In this study, double stacked Sb 2 O 3 /SiO 2 membranes in EIS structures were fabricated. The double stacked membrane annealed at 500 • C had a higher sensitivity, higher linearity, lower hysteresis voltage, and lower drift rate. Multiple material characterizations indicate that double stack structures and annealing could enhance the crystallization and reduce the defects. Sb 2 O 3 /SiO 2 -based with appropriate annealing show promises for future biomedical sensing devices.